DS3105LN+【PDF 9/124 页】IC TIMING LINE CARD 64-LQFP

DS3105

106

Exit1-IR. A rising edge on JTCLK with JTMS low puts the controller in the Pause-IR state. If JTMS is high on the

rising edge of JTCLK, the controller enters the Update-IR state and terminates the scanning process.

Pause-IR. Shifting of the instruction register is halted temporarily. With JTMS high, a rising edge on JTCLK puts

the controller in the Exit2-IR state. The controller remains in the Pause-IR state if JTMS is low during a rising edge

on JTCLK.

Exit2-IR. A rising edge on JTCLK with JTMS high puts the controller in the Update-IR state. The controller loops

back to the Shift-IR state if JTMS is low during a rising edge of JTCLK in this state.

Update-IR. The instruction shifted into the instruction shift register is latched into the parallel output on the falling

edge of JTCLK as the controller enters this state. Once latched, this instruction becomes the current instruction. A

rising edge on JTCLK with JTMS low puts the controller in the Run-Test-Idle state. With JTMS high, the controller

enters the Select-DR-Scan state.

Figure 9-2. JTAG TAP Controller State Machine

Test-Logic-Reset

Run-Test/Idle

Select

DR-Scan

Capture-DR

Shift-DR

Exit1- DR

Pause-DR

Exit2-DR

Update-DR

Select

IR-Scan

Capture-IR

Shift-IR

Exit1-IR

Pause-IR

Exit2-IR

Update-IR

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